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2015/16 Taught Postgraduate Module Catalogue

ELEC5566M FPGA Design for System-on-chip

15 creditsClass Size: 75

Module manager: Dr S Freear
Email: een5sf@leeds.ac.uk

Taught: Semester 2 (Jan to Jun) View Timetable

Year running 2015/16

This module is not approved as an Elective

Objectives

On completion of this module students will:
1. understand the principles of the design of digital signal processing systems for VLSI technologies;
2. have a detailed knowledge of digital design techniques for silicon chip technologies in the sub-100nm scale;
3. understand the fundamentals of implementing complex systems on a single chip;
4. be able to use contemporary EDA design tools to design practical examples.

Syllabus

1. The principles of the design of a digital signal processing system using VLSI technologies.
2. The use of contemporary EDA design tools, such as Altera Quartus, ModelSim and Mentor Graphics.
3. Complex system design with practical examples (such as digital filters, DCT and FFT).
4. Introduction to DSP system design.
5. DSP architectures and their synthesis.
6. Uni-processor designs.
7. Digital filter design.
8. Soft Processors.
9. VLSI Synthesis of DSP kernels.
10. Algorithmic and architectural transforms.

Teaching methods

Delivery typeNumberLength hoursStudent hours
Lecture101.0010.00
Practical103.0030.00
Independent online learning hours50.00
Private study hours60.00
Total Contact hours40.00
Total hours (100hr per 10 credits)150.00

Private study

Students are expected to read extensively in order to understand and complete the mini projects and the main project. The project will be partly carried out in timetabled classes and partly in the students' own time.

Opportunities for Formative Feedback

Students progress is monitored by assessment of the four mini-projects and by regular inspection of their log-book record of the project.

Methods of assessment


Coursework
Assessment typeNotes% of formal assessment
AssignmentAssignment 15.00
AssignmentAssignment 210.00
AssignmentAssignment 320.00
AssignmentAssignment 425.00
ProjectLog book - write-up20.00
ProjectLog book - viva20.00
Total percentage (Assessment Coursework)100.00

Normally resits will be assessed by the same methodology as the first attempt, unless otherwise stated

Reading list

There is no reading list for this module

Last updated: 11/04/2016

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