Module and Programme Catalogue

Search site

Find information on

2019/20 Undergraduate Module Catalogue

ELEC2665 Microprocessors and Programmable Logic

20 creditsClass Size: 140

Module manager: Mr. David Moore
Email: d.moore@leeds.ac.uk

Taught: Semesters 1 & 2 (Sep to Jun) View Timetable

Year running 2019/20

Module replaces

ELEC2660 - Mobile Applications Project

This module is not approved as a discovery module

Objectives

This module will extend the learning of digital electronics, following the establishment of the fundamentals in ELEC1620 in year one. The module will teach digital logic implementation from gate level combinational logic, all the way through to machine language and assembly instructions. These topics will be applied as a means of introducing programmable hardware – primarily FPGAs. Students will be taught how to implement digital designs onto programmable hardware, as well as simulate and verify designs before and after implementation. The module will be taught using industry standard tools and a bespoke development kit, giving students insight into various aspects of programmable hardware.

Learning outcomes
On completion of this module, students should be able to:

- Understand and apply engineering principles to the design of elementary logic gates from NAND gates, and the design of arithmetic logic units from logic gates;
- Understand and apply engineering principles to construct a memory system from flip flops, registers, RAM:
- Demonstrate knowledge of how logic gates, units and memory systems can be implemented on programmable hardware;
- Apply a systems approach to the design of complex digital devices including the combination of the ALU and memory system into a working computer platform;
- Understand the principles and application of instruction sets for writing programs in low-level assembly language;
- Demonstrate an understanding of the principles of assemblers;
- Demonstrate an ability to use simulation tools to verify a design for programmable hardware;
- Understand the principles of interfacing external peripherals with an FPGA device.


Syllabus

- Overview of the Hardware Description Language (HDL) used in the course; implementing logic gates in HDL;
- Combinational logic: implementation of a binary adder and simple ALU (Arithmetic-Logic Unit) in HDL;
- Sequential logic: flip-flop gates, registers and memory cells; design and implementation of a memory hierarchy in HDL;
- Machine language: introduction of an instruction set in both binary and assembly language; composition of low-level assembly programs running them on a CPU emulator;
- Computer architecture: integration of the previous designs into a model computer that executes maching code;
- Assembler: how an assembler coverts the assembly language files into binary machine code;
- HDL use in practical applications, specifically Verilog. Comparison of the similarities of Verilog to the bespoke HDL language used in Semester One;
- Designing digital logic circuits in Quartus which are then programmed onto a custom FPGA platform;
- Design of complex digital logic circuits, such as carry-lookahead adders and hardware multipliers, implemented in hardware and verified for speed compared to a microcontroller implementation;
- Introduction to Modelsim as an industry-standard simulation tool, using it to simulate logic designs and confirm their validity before programming onto hardware;
- Use of external peripherals such as switch inputs, potentiometers, LEDs and Seven Segment Displays to interface with the FPGA via GPIO and on-chip ADCs.

Teaching methods

Delivery typeNumberLength hoursStudent hours
Laboratory222.0044.00
Independent online learning hours20.00
Private study hours136.00
Total Contact hours44.00
Total hours (100hr per 10 credits)200.00

Private study

Students will be expected to complete pre and post lab exercises following each practical session as part of their private study. They will also have access to screencasts which accompany the lab material and will need to be viewed prior to each session, constituting part of their independent online learning.

Opportunities for Formative Feedback

Formative feedback will be given through informal discussion with students during the laboratory sessions. This may be at the request of students or when module staff feel it is necessary as a result of monitoring progress in the classroom.

Methods of assessment


Coursework
Assessment typeNotes% of formal assessment
PracticalPractical Test 120.00
PracticalPractical Test 220.00
PracticalPractical Test 330.00
PracticalPractical Test 430.00
Total percentage (Assessment Coursework)100.00

The re-sit format for this module will follow the policy for all ELEC laboratory-based modules and will require students to re-sit the module internally and re-attempt all aspects of the assessment, as described in the CoPA.

Reading list

There is no reading list for this module

Last updated: 30/04/2019

Disclaimer

Browse Other Catalogues

Errors, omissions, failed links etc should be notified to the Catalogue Team.PROD

© Copyright Leeds 2019