2024/25 Taught Postgraduate Module Catalogue

ELEC5566M FPGA Design for System-on-Chip

15 creditsClass Size: 180

Module manager: Professor Steven Freear
Email: s.freear@leeds.ac.uk

Taught: Semester 2 (Jan to Jun) View Timetable

Year running 2024/25

This module is not approved as an Elective

Module summary

This module explores the use of Hardware Description Language (HDL) for designing digital circuits and uses industry standard software tools for implementation on reprogrammable digital logic circuits using FPGAs.

Objectives

This module has the following objectives:
- To use Verilog Hardware Description Language (HDL) for designing digital circuits
- To explore and test the concepts learned using an FPGA platform.
- To learn industry standard software tools for implementation on reprogrammable digital logic circuits using FPGAs.

Learning outcomes
On successful completion of the module students will have demonstrated the following learning outcomes:
1. Apply knowledge of engineering principles to the solution of broadly-defined FPGA for system-on-chip problems.
2. Analyse broadly-defined FPGA for system-on-chip problems to reach substantiated conclusions using engineering principles.
3. Select and apply appropriate computational and analytical techniques to model complex FPGA for system-on-chip problems, discussing the limitations of the techniques employed.
4. Select and use technical literature and other sources of information to address broadly-defined FPGA for system-on-chip problems.
5. Design solutions for broadly-defined FPGA for system-on-chip problems considering a range of user, business and customer needs as appropriate.
6. Apply an integrated or systems approach to the solution of complex FPGA for system-on-chip problems.
7. Analyse the environmental impact of solutions to broadly-defined FPGA for system-on-chip problems.
8. Use practical laboratory and workshop skills to investigate complex FPGA for system-on-chip problems.
9. Select and apply appropriate materials, equipment, engineering technologies and processes.
10. Function effectively as an individual, and as a member or leader of a team. Evaluate effectiveness of own and team performance.
11. Communicate effectively on complex engineering matters with technical and non-technical audiences, evaluating the effectiveness of the methods used.

Skills Learning Outcomes

On successful completion of the module students will have demonstrated the following skills:
a) Application of science, mathematics and/or engineering principles
b) Problem analysis
c) Application of computational and analytical techniques
d) Searching and using technical literature
e) Design skills
f) Integrated systems approach
g) Sustainability
h) Practical and workshop skills
i) Technical awareness of engineering materials, equipment, technologies, and processes
j) Teamwork
k) Communication

Syllabus

Topics may include, but are not limited to:
• The principles of the design of a FPGA systems using Hardware Description Language (Verilog)
• The use of contemporary EDA design tools: Altera Quartus
• Test bench for digital design verification using Mentor Graphics ModelSim
• Design of sequential systems using finite state machines
• Using fixed point numbering systems to design arithmetic signal processing blocks
• Use of bus systems for interlinking complex IP blocks
• Parameterisation and re-use for the generation of IP blocks

Methods of Assessment

We are currently refreshing our modules to make sure students have the best possible experience. Full assessment details for this module are not available before the start of the academic year, at which time details of the assessment(s) will be provided.

Assessment for this module will consist of;

1 x Coursework
1 x Exam

Teaching methods

Delivery type	Number	Length hours	Student hours
Consultation	11	2.00	22.00
Lecture	10	1.00	10.00
Private study hours			118.00
Total Contact hours			32.00
Total hours (100hr per 10 credits)			150.00

Opportunities for Formative Feedback

Students studying ELEC modules will receive formative feedback in a variety of ways, which may include the use of self-test quizzes on Minerva, practice questions/worked examples and (where appropriate) through verbal interaction with teaching staff and/or post-graduate demonstrators.

Methods of assessment

Coursework

Assessment type	Notes	% of formal assessment
In-course Assessment	Coursework	70.00
In-course Assessment	Class Test	30.00
Total percentage (Assessment Coursework)		100.00

Normally resits will be assessed by the same methodology as the first attempt, unless otherwise stated

Reading list

There is no reading list for this module

Last updated: 30/04/2024

Disclaimer

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• Undergraduate module catalogue
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