2024/25 Undergraduate Module Catalogue
ELEC2130 Electronic Circuit Design
10 creditsClass Size: 160
Module manager: Dr. Virginia Pensabene
Email: v.pensabene@leeds.ac.uk
Taught: Semester 1 (Sep to Jan) View Timetable
Year running 2024/25
This module is not approved as a discovery module
Objectives
The objective of this module is to develop the skills and knowledge needed to design professional electronic circuits and systems. These include the ability to select and design signal-conditioning and detection circuits, gain a deeper understanding of operational amplifiers, use appropriate circuit simulation tools, select and design digital interfacing circuits and appreciate some of the wider issues in circuit design such as interference, power supply and thermal design, fail-safe design and the importance of modularity.Learning outcomes
On completion of this module students should be able to:
1. Select and design a range of op-amp circuits for signal conditioning, including amplifiers, buffers and active filters, using dual- and single-supply topologies.
2. Explain and quantify the limitations of op-amps and calculate the effects arising from common imperfections in op-amps.
3. Select and design a range of signal detection circuits based on op-amps and calculate the requirements for DC analogue-to-digital conversion.
4. Select and design appropriate methods for interfacing with, and between, digital circuit components.
5. Distinguish between the most common mechanisms for interference in electronic circuits and select methods to mitigate the effects of interference.
6. Select and specify suitable power supply solutions for electronic circuits, including calculations for thermal management.
7. Explain the benefits and requirements for system design concepts such as fail-safe design and modularity, and discuss the ethical principles of obsolesence in product design.
Syllabus
Topics may include, but are not limited to:
The role of signal conditioning in electronic circuits
Properties and applications of ideal operational-amplifiers
Gain analysis of op-amps with negative feedback and frequency compensation
Limitations and imperfections of real op-amps
Single-supply op-amp topologies
Instrumentation amplifiers
Active filters based on Sallen-Key circuits
Signal detection circuits using op-amps
Basic principles of analogue to digital conversion
Input/output properties of digital circuits, including embedded microprocessors Interfacing requirements between digital circuits, including load-switching
Characteristics of digital bus circuits using open-collector/drain or tri-state outputs
Inter-system digital communications using UART, SPI, I2C, CAN
Interference, and strategies to minimise unwanted coupling
Power supplies and thermal management
System design, including fail-safe design and modularity
Obsolescence and related ethical considerations of electronic product design
Teaching methods
| Delivery type | Number | Length hours | Student hours |
| Laboratory | 7 | 2.00 | 14.00 |
| Consultation | 9 | 1.00 | 9.00 |
| Examples Class | 5 | 1.00 | 5.00 |
| Lecture | 8 | 1.00 | 8.00 |
| Seminar | 1 | 1.00 | 1.00 |
| Independent online learning hours | 15.00 | ||
| Private study hours | 48.00 | ||
| Total Contact hours | 37.00 | ||
| Total hours (100hr per 10 credits) | 100.00 | ||
Private study
Students are expected to use private study time to consolidate their understanding of course materials, to undertake preparatory work for seminars, workshops, tutorials, examples classes and practical classes, and also to prepare for in-course and summative assessments.Opportunities for Formative Feedback
Students studying ELEC modules will receive formative feedback in a variety of ways, including the use of self-test quizzes on Minerva, practice questions/worked examples and (where appropriate) through verbal interaction with teaching staff and/or post-graduate demonstrators.Methods of assessment
Coursework
| Assessment type | Notes | % of formal assessment |
| In-course Assessment | Class Test 1 | 30.00 |
| Total percentage (Assessment Coursework) | 30.00 | |
Resits for ELEC and XJEL modules are subject to the School's Resit Policy and the Code of Practice on Assessment (CoPA), which are available on Minerva. Students should be aware that, for some modules, a resit may only be conducted on an internal basis (with tuition) in the next academic session.
Exams
| Exam type | Exam duration | % of formal assessment |
| Standard exam (closed essays, MCQs etc) | 3 hr 00 mins | 70.00 |
| Total percentage (Assessment Exams) | 70.00 | |
Normally resits will be assessed by the same methodology as the first attempt, unless otherwise stated
Reading list
There is no reading list for this moduleLast updated: 31/07/2024 13:52:03
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- Undergraduate module catalogue
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- Undergraduate programme catalogue
- Taught Postgraduate programme catalogue
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