2022/23 Undergraduate Module Catalogue

ELEC2665 Microprocessors and Programmable Logic

20 creditsClass Size: 160

Module manager: Dr. Craig Evans
Email: c.a.evans@leeds.ac.uk

Taught: Semesters 1 & 2 (Sep to Jun) View Timetable

Year running 2022/23

Module replaces

ELEC2660 - Mobile Applications Project

This module is not approved as a discovery module

Objectives

This module will extend the learning of digital electronics, following the establishment of the fundamentals in ELEC1620 in Level 1. The module covers digital logic implementation from gate level combinational logic, all the way through to machine language and assembly instructions. These topics will be applied as a means of introducing programmable hardware – primarily FPGAs. Students will be taught how to implement digital designs onto programmable hardware, as well as simulate and verify designs before and after implementation. The module will be taught using industry standard tools and a bespoke development kit, giving students insight into various aspects of programmable hardware.

Learning outcomes
On completion of this module students should be able to:

1. Design, simulate and test a range of digital circuits using a hardware description language.
2. Design, simulate and test the essential elements of standard microprocessor architectures using fundamental digital circuits.
3. Write programs in assembly language and assemble the instructions into binary machine code.
4. Use simulation tools to verify a design for programmable hardware.
5. Apply established principles of interfacing to connect external peripherals with an FPGA device.

Syllabus

Topics may include, but are not limited to:

Overview of the Hardware Description Language (HDL) used in the course
Implementing logic gates in HDL
Combinational logic: implementation of a binary adder and simple ALU (Arithmetic-Logic Unit) in HDL
Sequential logic: flip-flop gates, registers and memory cells
Design and implementation of a memory hierarchy in HDL
Machine language: introduction of an instruction set in both binary and assembly language
Composition of low-level assembly programs running them on a CPU emulator
Computer architecture: integration of the previous designs into a model computer that executes maching code
Assembler: how an assembler coverts the assembly language files into binary machine code
HDL use in practical applications, specifically Verilog
Comparison of the similarities of Verilog to the bespoke HDL language used in Semester One
Designing digital logic circuits in Quartus which are then programmed onto a custom FPGA platform
Design of complex digital logic circuits, such as carry-lookahead adders and hardware multipliers, implemented in hardware and verified for speed compared to a microcontroller implementation
Introduction to Modelsim as an industry-standard simulation tool, using it to simulate logic designs and confirm their validity before programming onto hardware
Use of external peripherals such as switch inputs, potentiometers, LEDs and Seven Segment Displays to interface with the FPGA via GPIO and on-chip ADCs

Teaching methods

Delivery type	Number	Length hours	Student hours
Laboratory	16	2.00	32.00
Office Hour Discussions	20	1.00	20.00
Lecture	2	1.00	2.00
Independent online learning hours			16.00
Private study hours			130.00
Total Contact hours			54.00
Total hours (100hr per 10 credits)			200.00

Private study

Students are expected to use private study time to consolidate their understanding of course materials, to undertake preparatory work for seminars, workshops, tutorials, examples classes and practical classes, and also to prepare for in-course and summative assessments.

Opportunities for Formative Feedback

Students studying ELEC modules will receive formative feedback in a variety of ways, including the use of self-test quizzes on Minerva, practice questions/worked examples and (where appropriate) through verbal interaction with teaching staff and/or post-graduate demonstrators.

Methods of assessment

Coursework

Assessment type	Notes	% of formal assessment
In-course Assessment	Report	30.00
In-course Assessment	Mini-project	40.00
Total percentage (Assessment Coursework)		70.00

Resits for ELEC and XJEL modules are subject to the School's Resit Policy and the Code of Practice on Assessment (CoPA), which are available on Minerva. Students should be aware that, for some modules, a resit may only be conducted on an internal basis (with tuition) in the next academic session.

Exams

Exam type	Exam duration	% of formal assessment
Online MCQ	1 hr 00 mins	15.00
Online MCQ	1 hr 00 mins	15.00
Total percentage (Assessment Exams)		30.00

Normally resits will be assessed by the same methodology as the first attempt, unless otherwise stated

Reading list

There is no reading list for this module

Last updated: 03/05/2022 14:36:20

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